Ravi Kumar Choubey

I am a PhD student working with Prof. Virendra Singh and an active member of the Computer Architecture and Dependable Systems Lab (CADSL) at IIT Bombay. My research interests lie in the "Performance and energy efficiency of AI accelerators," with a current focus on edge accelerators for Large Language Models (LLMs). 

Prior to joining IIT Bombay, I completed my master's thesis at IIT Palakkad and worked as a compiler developer intern at Qualcomm Innovation Center (QUIC), Hyderabad, India, with the mentorship of Unnikrishnan Cheramangalath, Ana Pazos and Raghunath Lolur. During my internship, I worked on "Code optimization for RISC-V targets in LLVM", with an emphasis on improving code generation and optimization for RISC-V architectures. 

I also worked with Prof. Vivek Chaturvedi at IIT Palakkad on "Power and energy optimization of modern DRAM systems", where I explored techniques to improve memory-system energy efficiency without compromising much performance.